SI8461DB www.vishay.com vishay siliconix s15-1510-rev. c, 29-jun-15 1 document number: 65001 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 p-channel 20 v (d-s) mosfet marking code: xxxx = 8461 xxx = date / lot traceability code ordering information : SI8461DB-t2-e1 (lead (pb)-free and halogen-free) features ? trenchfet ? power mosfet ? ultra small 1 mm x 1 mm maximum outline ? ultra-thin 0.548 mm maximum height ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 applications ?load switch ? battery switch ? charger switch notes a. surface mounted on 1" x 1" fr4 board with full copper, t = 10 s. b. surface mounted on 1" x 1" fr4 bo ard with minimum copper, t = 10 s. c. refer to ipc/jedec ? (j-std-020), no manua l or hand soldering. d. in this document, any reference to case represents th e body of the micro foot de vice and foot is the bump. e. based on t a = 25 c. f. surface mounted on 1" x 1" fr4 board with full copper. g. maximum under steady stat e conditions is 100 c/w. h. surface mounted on 1" x 1" fr4 board with minimum copper. i. maximum under steady stat e conditions is 190 c/w. product summary v ds (v) r ds(on) ( )i d (a) a, e q g (typ.) -20 0.100 at v gs = -4.5 v -3.7 9.5 nc 0.118 at v gs = -2.5 v -3.4 0.140 at v gs = -1.8 v -3.1 0.205 at v gs = -1.5 v -2 micro foot ? 1 x 1 bump s ide view 1 g 4 d s 3 s 2 back s ide view 1 1 mm 1 mm xxxx xxx s g d p-channel mosfet absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds -20 v gate-source voltage v gs 8 continuous drain current (t j = 150 c) t a = 25 c i d -3.7 a a t a = 70 c -3 a t a = 25 c -2.5 b t a = 70 c -1.9 b pulsed drain current i dm -20 continuous source-drain diode current t c = 25 c i s -1.5 a t a = 25 c -0.65 b maximum power dissipation t a = 25 c p d 1.8 a w t a = 70 c 1.1 a t a = 25 c 0.78 b t a = 70 c 0.5 b operating junction and storage temperature range t j , t stg -55 to +150 c package reflow conditions c vpr 260 ir/convection 260 thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient f, g t = 10 s r thja 55 70 c/w maximum junction-to-ambient h, i t = 10 s 125 160
SI8461DB www.vishay.com vishay siliconix s15-1510-rev. c, 29-jun-15 2 document number: 65001 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. pulse test; pulse width 300 s, duty cycle 2 %. b. guaranteed by design, not subj ect to production testing. stresses beyond those listed under absolute maximum ratings ma y cause permanent damage to th e device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those in dicated in the operational sectio ns of the specifications is not implied. exposure to absolute maximum rating conditions for extended pe riods may affect device reliability. specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = -250 a -20 - - v v ds temperature coefficient v ds /t j i d = -250 a --12- mv/c v gs(th) temperature coefficient v gs(th) /t j -2.5- gate-source threshold voltage v gs(th) v ds = v gs , i d = -250 a -0.4 - -1 v gate-source leakage i gss v ds = 0 v, v gs = 8 v - - 100 na zero gate voltage drain current i dss v ds = -20 v, v gs = 0 v - - -1 a v ds = -20 v, v gs = 0 v, t j = 70 c - - -10 on-state drain current a i d(on) v ds -5 v, v gs = -4.5 v -10 - - a drain-source on-s tate resistance a r ds(on) v gs = -4.5 v, i d = -1.5 a - 0.083 0.100 v gs = -2.5 v, i d = -1.5 a - 0.098 0.118 v gs = -1.8 v, i d = -1 a - 0.115 0.140 v gs = -1.5 v, i d = -0.5 a - 0.136 0.205 forward transconductance a g fs v ds = -10 v, i d = -1 a - 7 - s dynamic b input capacitance c iss v ds = -10 v, v gs = 0 v, f = 1 mhz - 610 - pf output capacitance c oss - 120 - reverse transfer capacitance c rss -95- total gate charge q g v ds = -10 v, v gs = -8 v, i d = 1 a - 16 24 nc v ds = -10 v, v gs = -4.5 v, i d = 1 a -9.515 gate-source charge q gs -0.9- gate-drain charge q gd -2.6- gate resistance r g v gs = -0.1 v, f = 1 mhz - 6.5 - turn-on delay time t d(on) v dd = -10 v, r l = 10 i d ? -1 a, v gen = -4.5 v, r g = 1 -1525 ns rise time t r -2540 turn-off delay time t d(off) -3555 fall time t f -1015 turn-on delay time t d(on) v dd = -10 v, r l = 10 i d ? -1 a, v gen = -8 v, r g = 1 -715 rise time t r -1220 turn-off delay time t d(off) -3250 fall time t f -1220 drain-source body diode characteristics continuous source-drain diode current i s t a = 25 c - - -1.5 a pulse diode forward current i sm ---20 body diode voltage v sd i s = -1 a, v gs = 0 v - -0.8 -1.2 v body diode reverse recovery time t rr i f = -1 a, di/dt = 100 a/s, t j = 25 c -1530ns body diode reverse recovery charge q rr -1020nc reverse recovery fall time t a -9- ns reverse recovery rise time t b -6-
SI8461DB www.vishay.com vishay siliconix s15-1510-rev. c, 29-jun-15 3 document number: 65001 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) output characteristics on-resistance vs. drain current and gate voltage gate charge transfer characteristics capacitance on-resistance vs. junction temperature 0 4 8 12 16 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v gs =5vthru2.5v v gs =1v v gs =2v v gs =1.5v v ds - drain-to-source voltage (v) - drain current (a) i d 0.00 0.05 0.10 0.15 0.20 0.25 0 5 10 15 20 v gs =1.8v v gs =2.5v v gs =1.5v v gs =4.5v - on-resistance ( ) r ds(on) i d - drain current (a) i d =1a 0 2 4 6 8 0 4 8 12 16 v ds =16v v ds =10v - gate-to-source voltage (v) q g - total gate charge (nc) v gs 0 1 2 3 4 5 0.0 0.5 1.0 1.5 2.0 t c = 25 c t c = 125 c t c = - 55 c v gs - gate-to-source voltage (v) - drain current (a) i d 0 300 600 900 1200 1500 048121620 c iss c rss c oss v ds - drain-to-source voltage (v) c - capacitance (pf) 0.8 0.9 1.0 1.1 1.2 1.3 - 50 - 25 0 25 50 75 100 125 150 i d =1a v gs =1.8v,1.5v v gs =4.5v,2.5v t j - junction temperature (c) (normalized) - on-resistance r ds(on)
SI8461DB www.vishay.com vishay siliconix s15-1510-rev. c, 29-jun-15 4 document number: 65001 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) source-drain diode forward voltage threshold voltage on-resistance vs. gate-to-source voltage single pulse power, junction-to-ambient safe operating area, junction-to-ambient 0.1 1 10 100 0.0 0.3 0.6 0.9 1.2 1.5 t j = 150 c t j = 25 c v sd - source-to-drain voltage (v) - source current (a) i s 0.3 0.4 0.5 0.6 0.7 0.8 0.9 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a (v) v gs(th) t j - temperature (c) 0.00 0.04 0.08 0.12 0.16 0.20 012345 t j = 25 c i d =1a t j = 125 c - on-resistance ( ) r ds(on) v gs - gate-to-source voltage (v) 0 5 10 15 20 25 power (w) time (s) 10 1000 0.1 0.01 0.001 100 1 100 1 0.1 1 10 100 0.01 10 0.1 t a = 25 c single pulse 100 s limited by r ds(on) * bvdss limited 1ms 10 ms 100 ms, 1 s 10 s, dc v ds - drain-to-source voltage (v) *v gs > minimum v gs at which r ds(on) is specified - drain current (a) i d
SI8461DB www.vishay.com vishay siliconix s15-1510-rev. c, 29-jun-15 5 document number: 65001 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) current derating a power derating note ? when mounted on 1" x 1" fr4 with full copper. note a. the power dissipation p d is based on t j (max.) = 150 c, using junction-t o-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the cu rrent rating, when this rating falls below the package limit. 0 1 2 3 4 0 25 50 75 100 125 150 t a - ambient temperature (c) i d - drain current (a) 0.0 0.3 0.6 0.9 1.2 1.5 25 50 75 100 125 150 t a - ambient temperature (c) power dissipation (w)
SI8461DB www.vishay.com vishay siliconix s15-1510-rev. c, 29-jun-15 6 document number: 65001 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) normalized thermal transient impedance, junction-to-ambient (1" x 1" fr4 board with full copper) normalized thermal transient impedance, junction-to-ambient (1" x 1" fr4 board with minimum copper) vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?65001 . 10 -3 10 -2 1 10 1000 10 -1 10 -4 100 0.2 0.1 square wave pulse duration (s) normalized effective transient thermal impedance 1 0.1 0.01 t 1 t 2 notes: p dm 1. duty cycle, d = 2. per unit base = r thja = 100 c/w 3. t jm -t a =p dm z thja (t) t 1 t 2 4. surface mounted duty cycle = 0.5 single pulse 0.02 0.05 10 -3 10 -2 1 10 1000 10 -1 10 -4 100 0.2 0.1 square wave pulse duration (s) normalized effective transient thermal impedance 1 0.1 0.01 t 1 t 2 notes: p dm 1. duty cycle, d = 2. per unit base = r thja = 190 c/w 3. t jm -t a =p dm z thja (t) t 1 t 2 4. surface mounted duty cycle = 0.5 single pulse 0.02 0.05
package information www.vishay.com vishay siliconix revision: 27-apr-15 1 document number: 69370 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 micro foot ? : 4-bumps (1 mm x 1 mm, 0.5 mm pitch, 0.286 mm bump height) notes 1. bumps are 95.5/3.8/0.7 sn/ag/cu. 2. backside surface is coated with a ti/ni/ag layer. 3. non-solder mask defi ned copper landing pad. 4. laser mark on the backside surface of die. 5. b1 is the diameter of the solderable substrate surface, defi ned by an opening in the solder resist layer solder mask define d. 6. ? is the location of pin 1 note ? use millimeters as the primary measurement. dim. millimeters inches min. nom. max. min. nom. max. a 0.458 0.504 0.550 0.0180 0.0198 0.0217 a1 0.214 0.250 0.286 0.0084 0.0098 0.0113 a2 0.244 0.254 0.264 0.0096 0.0100 0.0104 b 0.297 0.330 0.363 0.0117 0.0130 0.0143 b1 0.250 0.0098 e 0.500 0.0197 s 0.210 0.230 0.250 0.0083 0.0091 0.0096 d 0.920 0.960 1.000 0.0362 0.0378 0.0394 k 0.029 0.065 0.102 0.0011 0.0026 0.0040 ecn: t15-0176-rev. a, 27-apr-15 dwg: 6039 d e s a a1 a2 s d e xxxx xxx mark on back s ide of die s g d s note 5 bump (note 1) b k recommended land pattern e e 4x 0.30 to 0.31 (note 3) s older ma s k-0.4 b1 4x ? b1
legal disclaimer notice www.vishay.com vishay revision: 13-jun-16 1 document number: 91000 disclaimer ? all product, product specifications and data ar e subject to change with out notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of th e products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product , (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all implied warranties, includ ing warranties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain types of applicatio ns are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular applic ation. it is the customers responsibility to validate tha t a particular product with the prope rties described in the product sp ecification is suitable for use in a particular application. parameters provided in datasheets and / or specifications may vary in different ap plications and perfor mance may vary over time. all operating parameters, including ty pical parameters, must be va lidated for each customer application by the customer s technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product could result in personal injury or death. customers using or selling vishay product s not expressly indicated for use in such applications do so at their own risk. please contact authorized vishay personnel to obtain writ ten terms and conditions rega rding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.
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